SOE - Infi 90 Series INSEM01 | ABB - DCS Center

Description and Operation

Introduction

The Distributed Sequence of Events (SOE) provides the opera tor with an ordered sequence of state change events associated with up to 1,500 digital inputs with one millisecond resolution.

Digital input transitions are collected and time-stamped by I/O modules (IMSED01 and IMSET01). Noise and false transi tions are filtered. Then event data is acquired by the associated controller by means of two dedicated function codes (241 and 242) and made available to the INSEM01 module.

The INSEM01 module collects and sorts the data coming from different Harmony control units (HCU). The INSEM01 module also processes all event data and makes it available for display on a human system interface when a trigger condition is met.

The INTKM01 module manages sequence of event time. The INTKM01 module receives time information in IRIG-B format from an external satellite receiver and makes it available to the system through a dedicated time-synchronization link. The time-sync link connects the INTKM01 module and all the IMSET01 modules in the system. The connection to the time-sync link is achieved by a NTST01 unit.

INSEM01 Module

The INSEM01 module communicates directly with the INNIS01 module and the INTKM01 module over the I/O expander bus. The INSEM01 module manages the following events:

• 1,500 points coming from the SOE I/O modules in up to 1,000 Harmony control units. 

 • 256 complex triggers with 16 operands each. 

 • 3,000 simple triggers.

The INSEM01 module consists of one printed circuit board and occupies one mounting unit slot adjacent to its associated INNIS01 module and INTKM01 module.

Two captive latches on the INSEM01 faceplate secure the mod ule in the mounting unit. The faceplate contains 17 LEDs and a stop/reset switch.

INSEM01 module is configured by means of function codes 243, 244, 245 and 246 for the SOE parameters. INSEM01 module monitors the HCU nodes for data on an exception report basis, collects and sorts data acquired and provides sequence of events data to the human interface system for report presentation on a detection of a trigger condition.

INTKM01 Module

The INTKM01 module sends its internal time information to the INSEM01 module via the I/O expander bus and through the time-sync link via the NTST01 unit. The INTKM01 module can be connected to an external receiver using the IRIG-B time code link. The INTKM01 module uses the time information sent by the receiver to initialize and correct its time information. INTKM01 Installation in Section 3 describes the configuration needed for the Truetime Satellite Receiver model SRS.

Functions

The INTKM01 module performs the following functions:

 • Sends time information on the time-sync link every second. 

 • Makes available the time information in the absolute time format on the I/O expander bus for the INSEM01 module. 

 • Updates its internal clock and maintains its synchroniza tion with the time information provided by the external receiver.

The time information is transmitted every second from INTKM01 module on the time-sync link at 62.5 kilohertz. The time information is composed of the time information and the synchro pulse. The time information contains the number of milliseconds elapsed since 0:00 March 1, 1980, and is relative to the rising edge of the synchro pulse.

The absolute time is written every millisecond from the INTKM01 module on its I/O expander bus internal output buffer (FIFO out), in this way the absolute time is always avail able for the INSEM01 module.

The time information is received by the INTKM01 module from the NTST01 unit by an IRIG-B interface. The INTKM01 module cyclically updates and adjusts the internal time using this time information.

After power-on the internal time is initialized with the absolute time provided by the INSEM01 module and the time informa tion from the receiver. The absolute time is used to calculate the current year because the time information from the receiver does not contain this information. If the receiver is not present or does not supply the time information, the internal time is initialized with the absolute time from the time-sync master.

Updating Internal Clock

After the initialization the internal time information is adjusted with the time information provided by the receiver. If the receiver is absent the internal time information is not adjusted, and the precision of the time information generated by the INTKM01 module depends on the drift of the internal quartz oscillator.

The internal accuracy is set high if the INTKM01 module is synchronized by the receiver and low if the INTKM01 module runs with its internal quartz oscillator. Every one second the time information is transmitted from the receiver and the INTKM01 module uses this information to control and correct its internal clock.

Accuracy

The resolution of time information sent on the time-sync link is ±10 microseconds. The resolution of time information to the INSEM01 module is ±1 millisecond.

Block Diagram

INTKM01 module operations are controlled by the processor (Fig. 2-1). The module contains devices for the management of I/O for the external receiver and the I/O expander bus (I/O expander bus control, IRIG-B interface) and of the auxiliary computer devices (boot EPROM, RAM, machine fault timer, FIFO in and FIFO out, and time information interface).

Microprocessor

The INTKM01 module uses a DSP 2101, provided with internal memory for program and data storage, a timer and a bidirec tional synchronous serial line. DSP 2101 uses an external BOOT EPROM containing the module firmware and an exter nal RAM. In addition, the module contains the circuits for bus and address management. BOOT EPROM This memory is used upon power-on by the microprocessor to load its internal program memory. In addition, in the EPROM there is the configuration data pertinent to the logic circuitry of the board. RAM The RAM memory with 16 kiloword size is used for external code memory. FIFO These two FIFO memories are used to transfer data between the I/O expander bus master (INSEM01) and the internal microprocessor. FIFO in is used to transfer the absolute time from INSEM01 module to the INTKM01 module in the initialization sequence. FIFO out is used to transfer the absolute time information from the microprocessor to the I/O expander bus master. The abso lute time is written on FIFO out every one millisecond. The size of each memory is 512 bytes.

IRIG-B Interface

These circuits allow the connection between the INTKM01 module and the signal coming from the external receiver through the NTST01 unit. The IRIG-B time codes are a group of rate-scaled serial time formats containing the time-of-year in binary coded decimal. This time information includes days, hours, minutes, seconds, tenths of seconds, and hundredths of seconds. The IRIG-B is transmitted every second and the INTKM01 module accepts it in the DC level shift format.

Sync Time Information Interface

This interface is used to generate the sync time information. It is transmitted every second to the NTST01 unit. The time infor mation is generated by the serial port of the processor and a synchro pulse is generated by an internal synchro circuit. The transmission of the sync time information to the NTST01 unit is performed in a RS-485 standard at 62.5 kilohertz. The NTST01 unit transmits to the INTKM01 module, through a RS-485 line. If the INTST01 unit is in a fault state or is not con nected, the INTKM01 module detects the absence of its NTST01 unit.

I/O Expander Bus Control

These circuits include the control circuit for the accesses from I/O expander bus and the communication circuit and FIFOs between the microprocessor and I/O expander bus master (INSEM01). The circuits contain the module address set in the module address switch, and generate the control signals in the various types of access from I/O expander bus.

Machine Fault Timer

The microprocessor continually retriggers the machine fault timer. If the microprocessor or the firmware fails the controller goes in fail state. The INSEM01 module reads this state and stops the module operations.

IMSED01 and IMSET01 Modules

The IMSED01 and IMSET01 modules acquire 16 digital inputs from the field, and are connected by NTDI01 or NTU-7I1 termi nation units. They communicate through the I/O expander bus with the controller for exchanging data and information for event synchronization. The IMSET01 module is also connected to the time-sync link by an NTST01 unit. One IMSET01 module and up to 63 IMSED01 modules can be supported by one con troller.

Functions

The IMSET01 and IMSED01 modules perform two functions: • The acquisition of the 16 digital inputs from the field. • The synchronization of their internal clocks. The IMSET01 module receives the time information from the time-sync link and keeps the internal clocks synchronized with this time. The two modules are controlled by the controller, and communicate across the I/O expander bus. The controller keeps the IMSED01 modules synchronized by reading the time from the IMSET01 module and writing it to the IMSED01 mod ules with a broadcast message.

Digital Inputs

The IMSET01 and IMSED01 modules can operate in two dis tinct modes: DI standard mode and sequence of events mode. • In DI standard mode the 16 digital inputs are acquired by using dedicated function codes 241 and 242 which control the 16 digital inputs as a function code 84. In DI standard mode the digital inputs have a filter on each input channel. It is possible to select two response times by jumper: fast (1.5 milliseconds) and slow (18 milliseconds). • In sequence of events mode all digital inputs are acquired every millisecond and compared to the previous value. If there is a change in one or more inputs, the new status is stored internally and placed in a FIFO_out buffer (Fig. 2-2), with its own time-stamp. A debounce procedure and a delay procedure are processed during acquisition. The debounce procedure ensures the valid ity of an input state change. A configuration parameter (DBFILT, unique for the 16 DI channels) determines the dura tion for which an input reading must remain stable to be accepted as a state change. The delay procedure compensates for the delay time in switching from zero to one (T on) or from one to zero (T off) for each channel. T on and T off are configu ration parameters for each channel. The delay is the estimated delay between the occurrence of the physical event and the time at which the event has been detected. It is estimated on the basis of characteristics of the acquisition equipment, it can be different for transition from zero to one and for transition from one to zero. In addition, each digital input can be configured out of scan. A state change of an out of scan digital input is not placed in the FIFO_out.

Time-Synchronization

The sync time information is transmitted every second by the INTKM01 module on the time-sync link. The IMSET01 module receives the time information and uses it to update its internal clock.

IMSED01 Block Diagram

IMSED01 module operations are controlled by a microproces sor (Fig. 2-2). The module also contains devices for the man agement of I/O operations (I/O expander bus control, DI isolation, DI circuits), and microprocessor auxiliary devices (boot EPROM, RAM, machine fault timer, FIFO in and FIFO out).

Microprocessor

The IMSED01 module uses a DSP 2101, provided with an internal memory for program and data storage, a timer and a bidirectional synchronous serial line. DSP 2101 uses an exter nal BOOT EPROM containing the module firmware and an additional external RAM. The module also contains bus and address management circuits. BOOT EPROM This memory is used at power up to load the module program into RAM. RAM The RAM memory is partitioned into two pages of 14 kilowords each. The RAM is used for its external code memory and the buffer containing the DI status changes. FIFO The two FIFO memories are used to transfer data between the controller and the internal microprocessor. FIFO in is used by the controller to send the configuration parameters and the commands to the IMSED01 module. FIFO out is used to trans fer information relative to the digital input acquired in the sequence of events mode from the IMSED01 module to the controller. The size of each FIFO is 512 bytes.

Digital Input Isolation

These DI isolation circuits receive the state of the 16 digital input signals through the P3 connector. The supply voltages of the digital inputs are +24 VDC, +48 VDC, +125 VDC, 120 VAC and they must be supplied in the field or by the termination unit. The 120 VAC supply voltage can be used only for the DI standard mode. The setting of the input voltage is implemented on each channel by means of jumpers. Each channel contains an overvoltage protection circuit and an optocoupler which ensures that the card is totally isolated from the field。

Digital Input Circuits

After the isolators the digital inputs are sent to two distinct cir cuits. The first, known as threshold detection and hysteresis, is used for DI standard mode. The second, known as digital input register, is used for acquisition in sequence of events mode. The digital inputs in DI standard mode have a filter on each input channel. The filter, carried out with RC and a threshold comparator, make it possible to obtain two response times, selectable by a jumper: fast (1.5 milliseconds) and slow (18 mil liseconds). The filtered digital inputs are sent to the I/O expander bus. In the sequence event mode, downstream the optocoupler, in addition to being issued to the filters, the digital inputs are sent to digital input registers, from which they are read by the microprocessor. The states of the digital inputs are displayed by 16 LEDs on the front panel of the module.

I/O Expander Bus Control

These circuits include the control circuit for the accesses from I/O expander bus and the communication circuit and FIFOs between the processor and a controller. The circuits contain the module address (set in the module address switch), and generate the control signals in the various types of access from I/O expander bus.

Machine Fault Timer

The microprocessor continually retriggers the machine fault timer (MFT). If the microprocessor or the firmware fails, the controller goes in fail state. The controller reads this state and stops module operation.

IMSET01 Block Diagram

The IMSET01 module has the same block diagram of the IMSED01 module, with the addition of the time-sync input to the microprocessor block (Fig. 2-3).

Time-Sync Input

The IMSET01 module receives the time-sync link time informa tion from the NTST01 unit transmitted via the RS-485 stan dard. The time-sync input circuits convert the received signals and send them to the RX serial port of the microprocessor. If the NTST01 unit is in fault state or is not connected, the IMSET01 module detects the absence of the NTST01 unit.

NTST01 Termination Unit

The NTST01 termination unit attaches to a field termination panel with two screws and spacers. Figure 2-4 is the NTST01 block diagram. It is a printed board circuit that consists of: 

 • Input circuits. 

 • Output circuits. 

 • Optical isolators. 

 • INTKM01/IMSET01 interface. 

 • Voltage regulators (DC-to-DC converters). 

 • Bypass circuits. The input circuits permit the time information reception, when the NTST01 unit is connected to the IMSET01 module. In the INTKM01 connection, these circuits receive the time informa tion coming from the receiver in IRIG-B time code format. In both cases the time information received is sent to the modules connected through the INTKM01/IMSET01 interface. The output circuits are composed of line drivers used to trans mit the time information on the time-sync link. In the INTKM01 connection, the time information comes from the INTKM01 module through the INTKM01/IMSET01 inter face. In the IMSET01 connection the time information comes from the input circuits. The time information is sent to the P1 con nector using the RS-485 standard. The optical isolators provide isolation between the input circuits, the INTKM01/ IMSET01 interface, and the output circuits. The communication between the NTST01 unit and the INTKM01 and IMSET01 modules is accomplished by RS-485 standard lines, through the connector P2 on the INTKM01/ IMSET01 interface which converts the internal signals into the RS-485 standard. The voltage regulators and DC-to-DC converters generate the 24 VDC, all the output voltages to supply the input circuits, the INTKM01/IMSET01 interface, and the output circuits. All voltages generated by the block are controlled by the power supply control that puts the NTST01 unit in bypass if one of the voltages is absent. The bypass circuits operate when the NTST01 unit is con nected to the IMSET01 module. They permit the connection of the input lines to the output lines present on terminal block TB1. The NTST01 unit is in bypass, when there is no power or the power supply control has detected a fault condition. The NTST01 unit provides an automatic bypass device operat ing in case of fault as a protection-device against: voltage over flow, voltage inversion, temporary short circuit in the transmission circuits, and overvoltage in the transmission and receiving circuits. The output circuits are isolated from the input circuits.

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