OMRON CJ1G-CPU44H CPU module

OMRON CJ1G-CPU44H

If the IOM Hold BIt (A50012) is ON, the PV and Completion Flag will be

retained when a fatal error occurs or the operating mode is changed from

PROGRAM mode to RUN or MONITOR mode or vice-versa. The PV and

Completion Flag will be cleared when power is cycled.

2. If the IOM Hold BIt (A50012) is ON and the PLC Setup’s “IOM Hold Bit Sta

tus at Startup” setting is set to protect the IOM Hold Bit, the PV and Com

pletion Flag will be retained when the PLC’s power is cycled.

3. Since the TIML(542), TIMLX(553), MTIM(543), and MTIMX(554) instruc

tions do not use timer numbers, they are reset under different conditions.

Refer to the descriptions of these instructions for details.

4. The present value of HUNDRED-MS TIMER (TIM/TIMX(550)), TEN-MS

TIMER (TIMH(015)/TIMHX(551)), ONE-MS TIMER (TMHH(540)/TMH

HX(552)), TENTH-MS TIMER (TIMU(541)/TIMUX(556) (see note), HUN

DREDTH-MS TIMER (TMUH(544)/TMUHX(557)) (see note), TIMER

WAIT (TIMW(813)/TIMWX(816), and HIGH-SPEED TIMER WAIT (TM

HW(815)/TMHWX(817)) timers programmed with timer numbers 0000 to

2047 will be updated even when jumped between JMP and JME instruc

tions or when in a task that is on standby. The present value of timers pro

grammed with timer numbers 2048 to 4095 will be held when jumped or

when in a task that is on standby.

5. CJ1-H-R CPU Units only.

Timer Completion Flags can be force-set and force-reset.

Timer PVs cannot be force-set or force-reset, although the PVs can be

refreshed indirectly by force-setting/resetting the Completion Flag.

There are no restrictions in the order of using timer numbers or in the number

of N.C. or N.O. conditions that can be programmed. Timer PVs can be read as

word data and used in programming.

9-14 Counter Area

The 4.096 counter numbers (C0000 to C4095) are shared by the CNT,

CNTX(546), CNTR(012), CNTRX(548), CNTW(814), and CNTWX(818)

instructions. Counter Completion Flags and present values (PVs) for these

instructions are accessed with the counter numbers.

When a counter number is used in an operand that requires bit data, the

counter number accesses the Completion Flag of the counter. When a

counter number is used in an operand that requires word data, the counter

number accesses the PV of the counter.

With CJ1-H and CJ1M CPU Units, the refresh method for counter PVs can be

set from the CX-Programmer to either BCD or binary. With CJ1 CPU Units, it

can only be set to binary.

It is not recommended to use the same counter number in two counter

instructions because the counters will not operate correctly if they are count

ing simultaneously. If two or more counter instructions use the same counter

number, an error will be generated during the program check, but the counters

will operate as long as the instructions are not executed in the same cycle.

The following table shows when counter PVs and Completion Flags will be

reset.

Counter Completion Flags can be force-set and force-reset.

Interlocks

(IL-ILC)

Maintained

Counter PVs cannot be force-set or force-reset, although the PVs can be

refreshed indirectly by force-setting/resetting the Completion Flag.

There are no restrictions in the order of using counter numbers or in the num

ber of N.C. or N.O. conditions that can be programmed. Counter PVs can be

read as word data and used in programming.

9-15 Data Memory (DM) Area

The DM Area contains 32.768 words with addresses ranging from D00000 to

D32767. This data area is used for general data storage and manipulation

and is accessible only by word.