Mest IOP332 I/O Processor with

Mest IOP332 I/O Processor with

Product Highlights

■ 32-bit high-performance CPU (500, 667, 800MHz) based upon Intel XScale® microarchitecture

■ Integrated PCI Express to PCI-X Bridge (PCIExpress 1.0A compliant and PCI-X 1.0A, PCI2.3, compliant), B-segment provides PCI-X bussegment via transparent bridge for motherboardslots or devices and also supports PCI-X Hot Plug

■ Double Rate Data (DDR) 333 and DDR2-400SDRAM with ECC (up to 2 GB of 32-or 64-bitmemory, optional single-bit error correction/multibit detection support)

■ Enhanced memory controller with pipelinedaccess from the Intel XScale core to internalperipherals (programmable control for preemptionby the Intel XScale core and a multi-transactioncounter for performance tuning)

■ RAID5 XOR and iSCSI CRC32C off-load engines

■ 8-/16-bit, 66 MHz Peripheral Bus Interface(programmable bus width and wait states fortwo memory windows, two chip selects)

■ 266 MHz, 64-bit (up to 2.1 GB/sec) internal bus 

■ 2-channel DMA engine with support for scatterand gather of data blocks, automatic datachaining, and unaligned data transfers betweenPCI-to-local memory, local memory-to-PCI andmemory-to-memory (three 1 Kbyte data buffersper channel)

■ Up to 17 external interrupt inputs to the Interrupt Controller support vector generationand four priority levels

■ Two 16550-compatible UARTs (4-pin,Master/Slave capable, 64-byte Receive/Transmit FIFOs)

■ Eight GPIO pins that can also be used asexternal interrupt pins

■ Two industry-standard-based I2C interfaces

■ SM Bus support

■ Two programmable 32-bit Timers and Watchdog Timer

■ Typical power consumption is less than 10 Watts (500 MHz)

■ 829-ball FCBGA (37.5 mm2)Product OverviewHigh-Performance, I/O Processor Based on Intel XScale® TechnologyThe Intel® IOP332 is a highly integrated I/O system on a chip for RAID on Motherboard and I/O-intensive storage, networking andcommunicationsapplications. The IOP332features an 800 MHz CPU, high-performanceinternal bus, enhanced memory controller, high-bandwidth PCI Express to PCI-X Bridge, and an improved interrupt controller to provide a high-performance, highlyintegratedprocessorsolution. Target applications include RAID onMotherboard and PCI Express host-basedadapters (RAID cards, iSCSI cards, FC cards,Security SSL NICs, etc.), and a host of otherintelligent I/O applications that require a highlyintegrated, high-performance system on a chipprocessor with an integrated PCI Express interface.

As Intel’s next-generation I/O processor, the IOP332continues to build on Intel’s strength in delivering high-performance, low-power Intel XScalemicroarchitecture processors. It integrates Intel’sSuperpipelined RISC Technology with a 7-stageinteger/8-stage memory superpipelined core, 32 Kbytedata and instruction caches and operates up to 800MHz. The IOP332 is code compatible with previous generation Intel XScale microarchitecture processorssuch as the Intel® IOP321 I/O processor and otherARM-based devices, simplifying code porting fromexisting designs. It is compliant with the ARM v5TEinstruction set (excluding the floating point instructions).

The internal bus operates at 266 MHz and offers internalbandwidth of up to 2.1 GB/sec.

The IOP332 provides ultra-fast memory transactionsdue to its DDR SDRAM enhanced memory controllerand supports up to 2 GB of DDR 333 MHz memory or1 GB of DDR2-400 MHz memory. Registered andunbuffered DDR 333 and registered DDR2-400 DIMMscan be used with the IOP332. The memory controllersupports 32-bit or 64-bit memory subsystems with orwithout ECC. The IOP332 features a new enhancedmemory controller that provides a direct port from theCPU to memory (core port) as well as a port from theATU/internal bus to memory (internal bus port). Thisallows CPU memory accesses and data movement to and from the internal bus to occur providing highoverall system performance. Performance optimizationscan be made by programming the memory controllerarbiter to define the number of transactions a givenport can transfer at a time, therefore allowing the other port access to memory. It also helps maximizeprocessor performance by allowing the core topreempt an active transaction from the internal busportso the core is not waiting on a memory access.To provide higher core to memory performance, a 32-bit memory region can be defined in bank 0 toeliminate ECC Read-Modify-Write operations on 4-byte writes (which matches the Intel XScale microarchitecture data size). This 32-bit region is ideal forcore-related data structures, like DMA/AAU descriptorsor I/O controller descriptors and control blocks. The IOP332 also has made significant improvements tothe interrupt controller to help reduce interrupt latency.

The interrupt controller includes an advanced vectorgenerator for both FIQ and IRQ interrupts, delivering thevector directly to the interrupt service routine, whichsaves software overhead. Also included, is an interruptprioritizer that uses a two-bit field for each interruptsource to provide four levels of interrupt priority.

Related modelsMetso  D201291 Metso  IOP332R Metso  IOP320

application area

petroleum,
Natural gas,
Chemical industry,
Cement,
Metallurgy,
Ship,
Mining,
Aviation,
Transport,
Aluminum industry,
Mechanics,
Manufacturing,
Automobile

About us

The main products of Xiamen Controllers Automation Technology Co., Ltd. include modules, touch screens, frequency converters and drivers. In addition, they also provide electrical equipment wholesale, computer, software and auxiliary equipment wholesale, other mechanical equipment and electronic products wholesale, electrical installation, professional design services, software development, information system integration services, information technology consulting services and other businesses.The above information is for reference only. For more information, it is recommended to go to official website or consult relevant staff.