Руководство по установке компьютера Motorola MVME187 RISC
General Description
The MVME187 is a high functionality VMEbus RISC single board
computer designed around the M88000 chip set. It features:
o Onboard memory expansion mezzanine module with
4, 8, 16, 32, 64 or 128MB of onboard DRAM
o SCSI bus interface with DMA
o Four serial ports with EIA-232-D interface
o Centronics (parallel) printer port
o Ethernet transceiver interface with DMA
o 187Bug debug monitor firmware
Onboard Memory Mezzanine Module The MVME187 onboard DRAM mezzanine boards are available in different sizes and with programmable parity protection or Error Checking and Correction (ECC) protection. o The main board and a single mezzanine board together take one slot. o Motorola software supports mixed parity and ECC memory boards on the same main board. o Mezzanine board sizes are 4, 8, 16, or 32 MB (parity), or 4, 8, 16, 32, 64, or 128 MB (ECC); Ð Two mezzanine boards may be stacked to provide 256MB of onboard RAM (ECC) or 64 MB (parity). The stacked configuration requires two VMEbus slots. o The DRAM is four-way interleaved to efficiently support cache burst cycles. o The parity mezzanines are only supported on 25 MHz main boards. A functional description of the Onboard DRAM starts on page 2-15. SCSI Mass Storage Interface The MVME187 provides for mass storage subsystems through the industry-standard SCSI bus. These subsystems may include o Hard and floppy disk drives o Streaming tape drives o Other mass storage devices. A functional description of the SCSI Interface starts on page 2-22.
Serial Ports
The serial ports support standard baud rates of 110 to 38.4K baud.
All four serial ports use EIA-232-D drivers and receivers located on the main board, and all the signal lines are routed to the I/O connector. A functional description of the Serial Port Interface starts on page
Parallel (Printer) Port
The 8-bit bidirectional parallel port may be used as a Centronics compatible parallel printer port or as a general parallel I/O port. A functional description of the Parallel Port Interface starts on page
Ethernet Transceiver Interface
The Ethernet transceiver interface is located on the MVME187, and the industry standard connector is located on the MVME712X transition module. A functional description of the Ethernet Interface starts on page
187Bug Firmware
The MVME187Bug debug monitor firmware (187Bug) is provided in two of the four EPROM sockets on the MVME187. It provides: o Over 50 debug commands o Up/down load commands o Disk bootstrap load commands o A full set of onboard diagnostics o A one-line assembler/disassembler The 187Bug user interface accepts commands from the system console terminal. 187Bug can also operate in a System Mode, which includes choices from a service menu
Features
M88000 Microprocessor (one MC88100 MPU and two MC88200 or MC88204 CMMUs) 4/8/16/32/64MB of 32-bit DRAM with parity or 4/8/16/32/64/128/256MB of 32-bit DRAM with ECC protection o Four 44-pin PLCC ROM sockets (organized as two banks of 32 bits) o 128KB Static RAM (with optional battery backup as a factory build special request) o Status LEDs for FAIL, STAT, RUN, SCON, LAN, +12V (LAN power), SCSI, and VME. 8K by 8 static RAM and time of day clock with battery backup
RESET and ABORT switches o Four 32-bit tick timers for periodic interrupts o Watchdog timer o Eight software interrupts o I/O SCSI Bus interface with DMA Ð Four serial ports with EIA-232-D buffers with DMA Ð Centronics printer port Ð Ethernet transceiver interface with DMA o VMEbus interface VMEbus system controller functions VMEbus interface to local bus (A24/A32, D8/D16/D32 and D8/D16/D32/D64BLT) (BLT = Block Transfer) Ð Local bus to VMEbus interface (A16/A24/A32, D8/D16/D32) Ð VMEbus interrupter Ð VMEbus interrupt handler Ð Global CSR for interprocessor communications Ð DMA for fast local memory - VMEbus transfers (A16/A24/A32, D16/D32 and D16/D32/D64BLT)
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