Ovation MVME6100 Single Board Computer Emerson

Jumpers/switches are used to control those options that are not software configurable. These jumper settings are described further on in this section. If you are resetting the board jumpers from their default settings, it is important to verify that all settings are reset properly. Figure 1-1 illustrates the placement of the jumpers, headers, connectors, switches, and various other components on the MVME6100. There are several manually configurable headers on the MVME6100 and their settings are shown in Table 1-2. Each header’s default setting is enclosed in brackets. For pin assignments on the MVME6100, refer to Chapter 5, Pin Assignments. Items in brackets are factory default settings

The MVME6100 is factory tested and shipped with the configuration described in the following sections.

SCON Header (J7)

A 3-pin planar header allows the choice for auto/enable/disable SCON VME configuration. A jumper installed across pins 1 and 2 configures for SCON always enabled. A jumper installed across pins 2 and 3 configures for SCON disabled. No jumper installed configures for auto SCON.

PMC/IPMC Selection Headers (J10, J15 — J18, J25 — J28)

Nine 3-pin planar headers are for PMC/IPMC mode I/O selection for PMC slot 1. These nine headers can also be combined into one single header block where a block shunt can be used as a jumper

A jumper installed across pins 1 and 2 on all nine headers selects PMC1 for PMC I/O mode. A jumper across pins 2 and 3 on all nine headers selects IPMC I/O mode

PMC I/O Voltage Configuration

The onboard PMC sites may be configured to support 3.3V or 5.0V I/O PMC modules. To support 3.3V or 5.0V I/O PMC modules, both PMC sites on the MVME6100 have I/O keying pins. One pin must be installed in each PMC site and both PMC sites must have their keying pins configured he same way. If both keying pins are not in the same location or if the keying pins are not installed, the PMC sites will not function. Note that setting the PMC I/O voltage to 5.0V forces the PMC sites to operate in PCI mode instead of PCI-X mode. The VIO keying pins are the silver colored pins located either in the middle of each set of four PMC site connectors or just in front of those connectors. They serve two functions on the MVME6100: both as jumpers to select the PCIbus VIO signaling voltage for the PMC sites, and as keys to permit mounting of PMC cards that are compatible with that VIO signaling voltage

(or to exclude incompatible PMC cards). In the default position in the middle of the four PMC site connectors, the signaling voltage for the PMC sites is set to 5.0V. When the keying pins are moved to the alternate location in front of their set of four PMC connectors, the signaling voltage for the PMC sites is set for 3.3V. 1.4.4 The keying pins for both PMC sites must be set to the same signaling voltage. Note also that the signaling voltage has an effect on the PCI bus clock speed for the PMC sites. At 5.0V signaling, the PCI bus clock speed is limited to 33 MHz, whereas 3.3V signaling voltage supports conventional PCIbus clock speeds of 33 or 66 MHz, and PCIx clock speeds of 66 or 100MHz. A PMC card that requires 5.0V VIO only signaling has a hole in the middle of its four PMC connectors, such that it fits over the MVME6100's keying pin in that location. With the MVME6100's keying pin in the 3.3V location, that PMC card would be physically unable to be mounted. Similarly, a PMC card that requires 3.3V VIO-only signaling has its keying hole located just to the front of its four PMC connectors, and will only fit to the MVME6100 when the keying pin is located there. However, most modern PMC cards are universal with respect to the VIO signaling voltage they support, and have keying holes in both locations; that is, they will fit on the MVME6100's PMC site with the key in either location. For these PMC cards, it is recommended setting the MVME6100's keying pins to the 3.3V VIO signaling position, to allow the maximum PCIbus clock speed

Front/Rear Ethernet and Transition Module Options Header (J30)

A 40-pin planar header allows for selecting P2 options. Jumpers installed across Row A pins 3 10 and Row B pins 3-10 enable front Ethernet access. Jumpers installed across Row B pins 3-10 and Row C pins 3-10 enable P2 (rear) Gigabit Ethernet. Only when front Ethernet is enabled can the jumpers be installed across Row C and Row D on pins 1-10 to enable P2 (rear) PMC I/O. Note that all jumpers must be installed across the same two rows (all between Row A and Row B and/or Row C and Row D, or all between Row B and Row C).

SROM Configuration Switch (S3)

A part of the 8-position SMT switch, S3 enables/disables the MV64360 SROM initialization and all I2C EEPROM write protection. The SROM Init switch is OFF to disable the MV64360 device initialization via the I2C SROM. The switch is ON to enable this sequence.

The SROM WP switch is OFF to enable write protection on all I2C. The switch is ON to disable the I2C EEPROM write protection.

Setting the individual position to ON forces the corresponding signal to zero. If the board is installed in a 5-row backplane, the geographical address is defined by the backplane and positions 3-8 of S3 should be set to OFF. The default setting is OFF